For years, traditional hard disk drives (HDDs) dominated the storage market. But hindered by slow performance and moving parts that were susceptible to damage, HDDs are far from perfect. An alternative to HDDs are solid state drives (SSDs), which use flash memory, known as NAND, rather than a spinning disk. With advances in NAND technology over the past decade, SSDs now offer comparable storage volume to traditional HDDs, but in a much smaller footprint and consume a fraction of the energy.
Early flash memory was developed in the 1970s from electronically erasable programmable read-only memory (EEPROM), but it was fairly expensive to mass produce. One of the original types of flash memory, NAND was manufactured in ever increasing densities by shrinking the size of the NAND cells and pushing them closer together. This allowed for more data to be stored in a smaller area. However, the cells became so small and dense that further improvements became difficult. In order to advance the technology, the next iteration of NAND, known as Vertical NAND, or V-NAND, uses multiple layers of cells that are stacked vertically. This provides more storage within the same footprint as previous generation NAND options.
Reducing the dimensions of each cell on a chip increases storage capacity, but also it makes devices more difficult to produce. As the NAND cells get smaller (under 20 nanometers) the number of electrons stored in each cell is reduced, which makes the cells more difficult to read reliably and quickly. In addition, shrinking individual transistors on a chip beyond a certain point creates difficulties due to the increasing proximity to adjacent transistors.
Adjacent cells can interfere with one another if they are too close together. This interference is known as ‘noisy neighbor’ syndrome. This can cause an increasing bit error rate, which results in the need for stronger error correction code processing and complex algorithms. When this happens, more data processing is required, which in turn contributes to reduced potential drive speed and increased energy consumption.
The Next Innovation
Rather than trying to make individual cells smaller, which results in increased interference between cells and the need for more extensive error correction, Samsung has pioneered a new method of increasing storage capacity. Stepping back to 30-nanometer cells, the engineers at Samsung stacked multiple layers on top of one another and used Charge Trap Flash (CTF) technology, which reduces cell-to-cell interference. CTF cells require less voltage to write to cells compared to planar cells, which reduces the power required by the SSD while putting less stress on each cell. This helps to increase the endurance of the device. Samsung’s flash technology also stores three bits per cell rather than one, which further increases capacity. This combination produces faster, higher capacity flash memory that uses less power than its predecessors.
In addition to the V-NAND technology, Samsung SSDs (like the SM863 or PM863 for data centers, or the 850 PRO for client PC applications) use advanced controllers, which increase efficiency, providing greater endurance while consuming less power than by planar NAND-based SSDs.
The Future of 3D NAND Technology
At present, V-NAND SSDs use 32-layer technology. The 32-layer systems provide as much as 128 gigabit (Gb) per die; however, Samsung SSDs are already transitioning to 48-layer V-NAND, which increase die capacity to 256Gb. Additionally, the use of the newer Nonvolatile Memory Express (NVMe) protocol, Peripheral Component Interconnect Express (PCIe) interface and M.2 form factor will increase the storage density of the drive and speed of the connection between the computer motherboard and SSD storage, allowing the faster V-NAND technology to realize its full potential.
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